[chbot] RISC-V stuff.
cdhmanning at gmail.com
Wed Mar 6 21:10:56 GMT 2019
Hamster. Yes please v interested.
I'm looking at using a RISCV core in an FPGA.
On Thu, Mar 7, 2019 at 10:02 AM hamster <hamster at snap.net.nz> wrote:
> Yesterday I received a Sipeed MAiX M1w arrive in the mail from Seeed
> Studio. https://www.seeedstudio.com/sipeed
> It is RISC-V 64-bit dual core 400MHz CPU, 8MB of RAM, LCD and Camera
> interfaces, WiFi, and lots of odd hardware features "AI accelerator", "FFT
> A few lines of microPython later the camera and LCD were up and running.
> Not bad for < $US20.
> I posted on Twitter about it, and Bruce Holt (ex Samsung R&D, moving to
> the US to be with SiFive, knows a ton about a lot of CPUs) said that he
> would be in town sometime soon and would be happy to meet up and chat.
> Anybody else interested?
> Time and place TBA.
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