[chbot] FPGAs again ... Info so far
Michael Field
hamster at snap.net.nz
Tue Jul 26 11:29:41 BST 2011
I've just been looking at
http://www.altera.com/literature/po/ss_quartussevswe.pdf The "web
edition" looks as though it supports 32 bit OSs only. Is that just an
indication that it is a 32 bit binary, or is a 'hard' limitation?
Or perhaps more directly, is anybody using Altera Quartus II Software
v11.0 *Web Edition* on either Windows 7 x64 or on something like Centos
x64?.
Mike
On 26/07/2011 2:57 p.m., Charles Manning wrote:
> Hello All
>
> Prompted by various bits of feedback, herewith a roll-up of all the
> information I have been able to glean so far.
>
> #disclaimer. There might be some errors...
>
> Board
>
> The board of interest is the Terasic DE0-Nano which has an Altera Cyclone Iv
> with 22k "logic elements". 32Mbytes of SDRAM, easy to access 3V3 level IO
> pins etc etc.
>
> http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&No=593
>
> It is hard to compare effective gate size between architectures, but it is
> worth noting that a 32-bit Nios2 CPU uses approx 700 LEs. ie a small 32-bit
> CPU takes up approx 2.5% of the logic.
>
> It costs USD79 + shipping (USD10-15) = total of around USD90. For genuine
> students there might be a $20 discount, but I'm not prepared to try cheat
> them.
>
> Tools
>
> Free Web Edition versions of tools are available for both Windows and Linux.
> Not 100% sure what level of support there is for Linux, but scratching around
> on the forums show people using Ubuntu, Suse and RedHat.
>
> The tools include the ability to generate FPGA logic images as well as an IDE
> to develop/debug Nios software.
>
> Soft CPUs
>
> The free tools include unhindered use of the Nios2/e (limited stripped version
> of the Nios2 32-bit CPU. This version lacks caches and MMU so will not run
> Linux on the target. It will run ucLinux and various RTOSs though.
>
> The free tools include restricted versions of the more capable Nios2 CPUs
> which do have MMUs anc caches and should be Linux capable. The CPU must
> however be run either tethered to the development host or otherwise only runs
> for a fixed period before halting.
>
> The NIOS is interesting in that it is really easy to add up to 256 custom
> instructions. That means interesting manipulations which might take many
> instructions on a general purpose CPU can be potentially encoded as a single
> instruction.
>
> Other soft CPUs are available from opencores.org and elsewhere and include
> OR1K, LEON (SPARC) and others.
>
> Ordering
>
> I intend to put in an order at the end of the week.
>
> So far boards will be ordered for:
>
> Myself
> Timothy
> Richard
> Volker Kuhlmann
> Paul Davey
>
> Delivery should be less than 1 week.
>
> If you want to be added/removed from this list, please contact me on or off
> the list.
>
> Regards
>
> Charles
>
>
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