[chbot] FPGAs again

[Richard Jones]

Hi Charles, please add my name to the Linux capable fpga board list. Thanks
Richard Jones

Sent by my Android!

On 23/07/2011 7:20 PM, "Paul Davey" <plmdvy at gmail.com> wrote:
> On Sat, Jul 23, 2011 at 4:02 PM, Charles Manning <cdhmanning at gmail.com>
wrote:
>> On Fri, Jul 22, 2011 at 9:40 PM, Volker Kuhlmann
>> <list0570 at paradise.net.nz> wrote:
>>> On Fri 22 Jul 2011 15:37:01 NZST +1200, Charles Manning wrote:
>>>
>>>> I believe the last discussion on FPGAs was silenced by the Feb
earthquakes.
>>>
>>> :-(
>>>
>>>> The choice is really between:
>>>> * Cheapest: $49
>>>> * Pay a bit more but get much more toys (DE0-nano): $39.
>>>
>>> So the choice is between cheapest and really cheapest... :-))
>>
>> Sorry, my typo. $79, not $39.
>>
>>>
>>> I would be interested. The potential to run Linux sounds good.
>>> But I don't remember the story about development tools. Do they run *on*
>>> Linux too? There appears to be nothing mentioning Linux on terasic's
>>> site, although Altera seems to have at least heard of it and has
>>> software for it, but I am unsure as to the extent of this and what all
>>> those names on te Altera site mean.
>>>
>>> Did anyone have a look at Linux as development platform, and what was
>>> the result?
>>
>>
>> The De0-nano development is done with the Altera tools. There are
>> Linux versions of the FPGA and NIOS IDE. I therefore assume it is
>> possible to do everything under Linux.
>> https://www.altera.com/download/software/quartus-ii-we
>> https://www.altera.com/download/software/nios-ii
>>
>>
>> The Terassic tutorial is Winpoo based, but I expect the workflow is
>> pretty much the same. The Terassic media includes a Windows program
>> that communicates with the demo images. That might not work, but
>> that's not really part of the learning.
>>
>> Other stuff I have found out:
>> * The DE0-nano board has the equivalent of an Altera BitBlaster (or
>> whatever it is called) USB  cable built in. This downloads the images
>> as well as providing a debugging link (think JTAG cable) for software
>> debugging etc. It can also be used as a target<-->host link for comms.
>>
>> * There are over 70 FPGA pins that come out on the headers. These are
3V3.
>>
>> There are various projects that provide Linux running on NIOS2. At the
>> low end there's a uclinux that runs on nios configured without an MMU
>> or full-fat Linux running on nios with an MMU.
>>
>> There are also various RTOS ports to nios too.
>>
>> Since the FPGA has 22K logic elements and the nios can be configured
>> as low as 700 logic elements, there's a whole pile of space to do
>> interesting logic or multi-core dabbling.
>>
>> Shipping for the Terassic board is approx USD40 based on 3 boards, so
>> budget USD10 each. ie a total of USD89.
>>
>> Personally I think that's a bargain for what you get.
>>
>> I would like to place an order at the end of next week, so please let
>> me know if you're in.
>
>
> I'm in.
>
> I guess its a difference in the design and also they are different
> parts, but the actel Smartfusion board I have has 200k system gates
> and 4608 tiles (D-flip-flops)
> So assuming what logic elements are is one of these two this is either
> much bigger than the smartfusion or much smaller.
>
> Anyway having two things will be interesting for trying different things.
>
> Paul
>
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