[chbot] Any Xilinx Vivado experts out there?

[Charles Manning]

Thanks Hamster

I have been using the schematic tool (block design) and I managed to create
an External Port for the relevant EMIOs. It looks like all I need to do is
set up an XDC to  constrain those. If you go into the External Port
properties there does not seem to be any way to set the pin location.

Seems amazing to me that there is no very obvious way to create a pin in
the Block Design tool.

I'll fiddle a bit more or I might come cry on your shoulder.

Thanks

Charles



On Wed, Apr 26, 2017 at 9:10 AM, hamster <hamster at snap.net.nz> wrote:

> Hi Charles,
>
> Had a look at https://www.xilinx.com/support/documentation/user_
> guides/ug585-Zynq-7000-TRM.pdf, page 584, and it looks as though it
> should be possible.
>
> Are you using a HDL top level or a block/IP top level design?
>
> If you are using a HDL design, the PS7 component should just expose the
> signals you need, so add signals to your top level and wire them through,
> plus add location and I/O standards to the .XDC file.
>
> If you are using a block top level design, then you have my sympathies.
> You will need to create/add a new Port (and maybe define the port
> definition if the existing one in the catalogue only have RX+TX signals
> present) and then try to make it connect to the UART port on the PS7 block.
>
> If you want, I can try it at home and let you know how I get on.
>
> I haven't watched all 18 minutes of it, but this looks to be somewhat
> useful: https://www.youtube.com/watch?v=6fynCwxBMMM
>
> On 26.04.2017 08:25, Charles Manning wrote:
>
> Botters,
>
> I have a very frustrating thing I am trying to solve with using Xilinx
> Vivado to set up what should be a very simple bitstream.
>
> I am using a Zynq and all I want to do is hook up the EMIO RTS and CTS
> signals to PL pins.
>
> I have taken an existing "getting started" Zynq design for the Zynq and
> have turned on the extra UART signals so I can see them in the processor
> block diagram in block design view.
>
> Now I'm struggling with what should be the easy bit: define input and
> output pins and hook them up.
>
> I tried "make external" which creates ports for these signals, but those
> do not turn up in the pin planner.
>
> Can anyone lead me through this?
>
> Thanks
>
> Charles
>
>
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