[chbot] FPGA AudioBox project - web site

Paul Davey plmdvy at gmail.com
Tue Aug 20 10:14:49 BST 2013

Hi Mark,

I notice in your processing engine section you have this sentence:
"This module has as it's heart an Altera Cyclone IV EP4CE22F17C6N
device with about 22,500 Logic Elements (quarter of a million
traditional gates (?)."
I notice the question mark on the comparison to gates, this comparison
is difficult to do for FPGAs because the way they work is
fundamentally different from how you use discrete logic or build
ASICs.  However first we have the question of what exactly a Logic
Element (LE) is, this document helps clarify this term for Cyclone IV
FPGAs: http://www.altera.com/literature/hb/cyclone-iv/cyiv-51002.pdf
(comparing between FPGA brands and families can be difficult as well
because the numbers are usually given for "slices" or "logic elements"
without clear indication of what these are), now armed with the
knowledge that an LE is a 4 input LUT (lookup table) and a single
register (flip flop) we now know that each LE can implement an
arbitrary 4 input combinational logic function and a 1 bit register.
These can be combined to make larger registers.
Now for the first important difference from an ASIC, in an FPGA all
combinational logic is accomplished by using an SRAM lookup table to
encode the boolean function of the inputs, this means that a single 4
input LUT can be equivalent to several traditional gates depending on
how it is used.
Another important point is that just because you have 22,500 Logic
elements, this does not mean you can ever use all of them, because the
design must still be able to be routed in the interconnection fabric,
the higher the utilisation of resources the harder it is to route all
of the signals and keep delays within the required bounds.

Hopefully this rambling has helped atleast a little bit to clarify the
difference between an FPGA and discrete gates and the complexities in
comparing them. I have not even gotten to the point of block RAM and
DSP slices which are important for considering if a design can be
implemented efficiently in an FPGA and which do not translate to gates
very well because they do one function(more like a small selection of
functions) and that function very well.


On Tue, Aug 20, 2013 at 1:29 PM, Mark Atherton <markaren1 at xtra.co.nz> wrote:
> Hi All,
> A couple of you asked how the documentation associated with the project was
> going...
> <http://www.idesignz.org/AudioBox/AudioBox.htm>http://www.idesignz.org/AudioBox/AudioBox.htm
> Regards,
> Mark

More information about the Chchrobotics mailing list