Are zero-NRE low-cost mixed-signal ASICs interesting?

Bill Cox waywardgeek at gmail.com
Wed Oct 1 22:02:01 BST 2014


Some of you guys are sure to also get this on the crypto list.  Sorry
about the double-email!

I would like your guys opinions on a mixed-signal ASIC idea, and some
of you guys seem to know a bit about both ASICs and small volume board
production.  For example, Paul seems to know his stuff.

I am trying to find out if there is any need for board-level designers
out there to be able to create small mixed-signal ASICs.  I'm not
talking about an iPod-Nano on a chip, but simple arrays of capacitors,
resistors, transistors, a few logic gates, and maybe some amplifiers -
not coincidentally a good platform for building Infinite Noise
Multipliers :-) The die would be tiny, and each would have the same
components.
Designs would be configured with custom routing.  The minimum order
might be 1,000.

So, for example, a chip you could design using say 100 0.1pF caps, 300
6K Ohm resistors, maybe 50 analog N and P mosfets configured for
analog (wide gates), maybe 20-ish T-gates, and 20-ish logic gates
(NAND/NOR/INV), a couple of op-amps, and maybe 16 pads, and come in
some tiny 16-pin surface mount package.  It might even have 1K-ish
gates of real logic, and 128 FLOPs, and even a small block of SRAM, if
people think it should.  The resistors would not be very accurate, but
they would match well.  Same thing for the other components.  It would
come with free design tools, likely based on existing open-source
tools.

Something like this I think can be done for under $1/chip, in
quantities of 1,000.  I am trying to figure out if this is a good fit
for helping enable the Internet of Things.  It might be useful for
simple sensor interfaces, for example, or reducing part-counts and
size.  Of course, you guys here know as well as I that the Internet of
Things has a major security problem...

Would anything like that be exciting?

Thanks
Bill
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