<div dir="ltr"><div>Perhaps 2 meetings...</div><div><br></div><div>General interest meeting + a high brow meeting.</div><div><br></div><div><br></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Thu, Mar 7, 2019 at 1:06 PM Mark Atherton <<a href="mailto:markaren1@xtra.co.nz">markaren1@xtra.co.nz</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
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<div class="gmail-m_6201671390578624809moz-cite-prefix">Mike,</div>
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<div class="gmail-m_6201671390578624809moz-cite-prefix">Any chance Bruce Holt might be
available on 18th March to attend our meeting -- sounds like an
ideal speaker.</div>
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<div class="gmail-m_6201671390578624809moz-cite-prefix">-Mark<br>
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<div class="gmail-m_6201671390578624809moz-cite-prefix">On 7/03/2019 10:10 AM, Charles Manning
wrote:<br>
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<div>Hamster. Yes please v interested.</div>
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<div>I'm looking at using a RISCV core in an FPGA.</div>
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<div dir="ltr" class="gmail_attr">On Thu, Mar 7, 2019 at 10:02
AM hamster <<a href="mailto:hamster@snap.net.nz" target="_blank">hamster@snap.net.nz</a>> wrote:<br>
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<p>Hi,</p>
<p>Yesterday I received a Sipeed MAiX M1w arrive in the mail
from Seeed Studio. <a href="https://www.seeedstudio.com/sipeed" target="_blank">https://www.seeedstudio.com/sipeed</a></p>
<p>It is RISC-V 64-bit dual core 400MHz CPU, 8MB of RAM, LCD
and Camera interfaces, WiFi, and lots of odd hardware
features "AI accelerator", "FFT accelerator"...</p>
<p>A few lines of microPython later the camera and LCD were
up and running. Not bad for < $US20.</p>
<p>I posted on Twitter about it, and Bruce Holt (ex Samsung
R&D, moving to the US to be with SiFive, knows a ton
about a lot of CPUs) said that he would be in town
sometime soon and would be happy to meet up and chat.</p>
<p>Anybody else interested?</p>
<p>Time and place TBA.</p>
<p>Mike</p>
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