[chbot] For those of you interested in RISCV...

[Charles Manning]

Hi All

If you're getting sick of Netflix and need a bit of brain stretching, there
are some interesting online training courses on RISCV.

https://riscv.org/risc-v-learn-online/

Some are free. Some are free-ish, but need payment if you want a
certificate and some are big $.

I started with
Introduction to RISC-V (LFD110x)
<https://www.edx.org/course/introduction-to-risc-v>
There is some interesting stuff in there but, not much technical and far
too much focus on the various bodies within the RISCV organisation (Which
body is responsible for xyz specification).

I am now almost finished with

Building a RISC-V CPU Core (LFD111x)
<https://www.edx.org/course/building-a-risc-v-cpu-core>

This goes about building a simple (single cycle) 32-bit RISC V core in RTL
and simulating it. No hardware required. Fun course.

The RTL is called TL-Verilog - a sort of decorated verilog with an
interesting GUI that is completely web based so zero tools needed etc.

I'm enjoying this for a bit of fun and as a way to learn a few bits and
pieces as I tackle my SysVerilog RISCV from scratch.

Next I'm trying to sign up for the Imagination course. That, however,
requires an FPGA board - thankfully one that I already have.

IMHO it is quite likely we're going to see quite a shift to RISCV in the
next few years. It's a very clean architecture - far cleaner than anything
else I've looked at - so renders very frugal CPU implementations. China is
pushing this hard as part of their 5 year plan to be technically
self-sufficient by 2025. And, of course, everyone likes free!
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