[chbot] Synco's !!!Choc fish challenge!!!!(Pulse length measurement)

[Synco Reynders]

Hi Jimmy,
  This problem will arise if you use a timer and need to extend the timer
range (say using a 16bit to measure a time as 32bit), so you catch/count the
overflows of the timer. This all works fine until both interrupts can occur
together. Diagram below hopefully shows you that when it comes to the
handling of the interrupts, you can not determine which one came first.
(I've used another ISR, however it could even be the interrupt
prologue/epilogue, where the global interrupts are turned off).

OTHER ISR (no-nesting) ---###########------------
EXT INTERRUPT          ------1-------------------
COUNTER OVERFLOWS      ----------2---------------
Handling of external   --------------####-------- (since higher priority
than overflow)
Handling of overflow   ------------------###-----

OTHER ISR (no-nesting) ---###########------------
EXT INTERRUPT          ----------2---------------
COUNTER OVERFLOWS      ------1-------------------
Handling of external   --------------####-------- (since higher priority
than overflow)
Handling of overflow   ------------------###-----

PS. I'm using an AVR ATmega8, and no I can't use the capture timer pin.
Hope that helps peoples understanding,
/s



On 22 July 2011 23:14, jimmy allen <jimmy1248 at gmail.com> wrote:

> > I've had a frustrating day trying to code up a brushless DC motor
> > controller... (hence the procrastinating).
> > Anyway I'd like to put this winning chocolate fish up for grabs again to
> the
> > first person that tells me how to measure a pulse-width (connected to an
> > external interrupt), glitch-free!! :
> > This is roughly what I got:
> >
> > #define TIMERWRAP     1024
> >
> > ISR(ExternalInterrupt)  // highest priority
> > {
> >     if (triggered on +ve edge) {
> >        set to trigger on -ve edge;
> >        count = TIMERWRAP - Timer;
> >     }
> >     else {
> >         set to trigger on +ve edge;
> >         count += Timer;
> >         // Now Count should be the pulse length... but it has glitches
> see
> > below
> >     }
> > }
> >
> > ISR(TimerOverflow)   // overflows at TIMERWRAP ticks
> > {
> >     count += TIMERWRAP;
> >     ....
> > }
> >
> > ISR(other)
> > {
> >    ...
> > }
> >
> > Now the problem occurs (very infrequent) when both the TimerOverflow and
> > External interrupt occur while another (non-nesting) ISR is being
> processed.
> > The Ext Interrupt will be processed first therefore missing out on the
> > extra TIMERWRAP. I've tried compensating by reading the interrupt flag
> > register when processing the external interrupt, it reduces the frequency
> of
> > glitches but as-long as there is any time between reading the flags
> register
> > and the timer I get glitches.
> > Is this one of those impossible micro-processor problems?
> >
> >
>
> Hi Cynco
>
> Could this problem be solve using a timer in very much the same way
> ADC is done using a timer.Also what processor is being used.
>
> Jimmy
>
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